In recent years, computer terminals such as notebook computers and personal digital assistant (PDA) terminals have become remarkably popular. Many of these computer terminals are equipped with a host controller as an interface circuit which enables optional use of memory cards. Common memory cards employ an input/output method based on a single data rate (SDR), in which data transfer frequency is set to the same clock frequency (×1) as data read/write frequency for an internal memory cell array. Also recently, there have appeared double-data-rate (DDR) memory cards in which magnification of transfer clock frequency is twice the aforementioned data read/write frequency, and double data rate 2 (DDR2) memory cards in which the magnification is four times the data read/write frequency.
Meanwhile, conventional host controllers are designed to be compatible with memory cards according to the SDR method, and are therefore incompatible with memory cards according to the DDR method. Although host controllers compatible with the DDR method have been proposed, such host controllers are incompatible with the SDR method in contrast. These circumstances give rise to enhancement of installation space and power consumption when hardware equipments for the SDR method and for the DDR method are built in one device together.